Welcome the openFPGA Developer SDK beta. Noted features will be implemented in upcoming releases.
A "core" on Pocket refers to an FPGA bitstream packaged with JSON definition files, which configure loading and operation on Pocket.
Pocket uses two FPGAs. The Primary Core FPGA is entirely available to Developers and a smaller System FPGA is used exclusively for Analogue OS.
Operations of a core are managed by the Analogue Platform Framework (APF) implemented in both Pocket embedded functions and the Developer’s core with code supplied by Analogue.
Cores have full access to the array of hardware and I/O connected to the FPGA, which includes the following:
Refers to any unique combination of hardware that the core implements. Platforms can be user-created, multiple cores can support a common platform, and a core can support multiple platforms. Common assets are organized by platform.
When dealing with the framework the “host” refers to Pocket while “target” refers to the running core. Commands may be sent in either direction. For example, a target command would be [0180 Data slot read]
where the target/core wants to read from an offset in one of its asset files. In this case the device/Pocket would respond with the desired data.
Another example would be when the host wants to stop running the core. Pocket sends a host command to put the target/core back into reset before shutting it down. See the “Host/Target Commands” page.
A core can have up to 32 associated assets, which can be loaded or saved by the core and have various properties such as nonvolatile, read-only, etc. Each slot is given a unique 16-bit ID to provide some abstraction between the ordering of the physical slots and their logical representation.